Difference between revisions of "ISO26262/V-Cycle/5. Product development at the hardware level"
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+ | [[File:5.V-Cycle-Product_Development_HW_level.png]] | ||
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+ | During this phase the necessary activities and processes needed to develop safety critical hardware are planned. | ||
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+ | '''These activities and processes include:''' | ||
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+ | * Hardware implementation of the technical safety concept | ||
+ | * Analysis of potentioal hardware faults and their effects | ||
+ | * Coordination with software development | ||
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+ | [[File:5_SafetyLifecycle-Hardware_Detailed.png]] | ||
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+ | [[ISO26262/V-Cycle/5-5_Initiation_of_Product_Development_at_the_Hardware_Level|5-5 Initiation of Product Development at Hardware Level]] | ||
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+ | - Planning of safety activities in hardware development | ||
+ | - Further refinement of the Safety Plan | ||
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+ | [[ISO26262/V-Cycle/5-6_Specification_of_Hardware_Safety_Requirements|5-6 Specification of Hardware Safety Requirements]] | ||
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+ | - Derivation of hardware safety requirements from the technical safety concept and system design specification | ||
+ | - Specification of reliability requirements to be met by hardware | ||
+ | - Detailing of the hardware-Software Interface specification | ||
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+ | [[ISO26262/V-Cycle/5-7_Hardware_Design|5-7 Hardware Design]] | ||
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+ | - Design the hardware in accordance with the system design specification and the hardware safety requirements | ||
+ | - Verify the hardware design against the system design specification and the hardware safety requirements | ||
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+ | [[ISO26262/V-Cycle/5-8_Evaluation_of_the_Hardware_Architectural_Metrics|5-8 Evaluation of the Hardware Architectural Metrics]] | ||
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+ | - Evaluate the hardware architecture regarding the compliance to the safety requirements | ||
+ | - Single Point Fault Metrics (SPFM) | ||
+ | - Latent Fault Metric (LFM) | ||
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+ | [[ISO26262/V-Cycle/5-9_Evaluation_of_the_Safety_Goal_violations_due_to_Random_Hardware_Failure|5-9 Evaluation of the Safety Goal Violations]] | ||
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+ | - Prove that the risk of a safety goal violation, dus to random hardware failures, is sufficiently low (Use PMHF or Joe Miller method) | ||
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+ | [[ISO26262/V-Cycle/5-10_Hardware_Integration_and_Testing|5-10 Hardware Integration and Testing]] | ||
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+ | - Verification of the compliance of the developed hardware with the hardware safety requirements and hardware specification, by testing. |
Revision as of 14:11, 15 September 2017
During this phase the necessary activities and processes needed to develop safety critical hardware are planned.
These activities and processes include:
- Hardware implementation of the technical safety concept
- Analysis of potentioal hardware faults and their effects
- Coordination with software development
5-5 Initiation of Product Development at Hardware Level
- Planning of safety activities in hardware development - Further refinement of the Safety Plan
5-6 Specification of Hardware Safety Requirements
- Derivation of hardware safety requirements from the technical safety concept and system design specification - Specification of reliability requirements to be met by hardware - Detailing of the hardware-Software Interface specification
- Design the hardware in accordance with the system design specification and the hardware safety requirements - Verify the hardware design against the system design specification and the hardware safety requirements
5-8 Evaluation of the Hardware Architectural Metrics
- Evaluate the hardware architecture regarding the compliance to the safety requirements - Single Point Fault Metrics (SPFM) - Latent Fault Metric (LFM)
5-9 Evaluation of the Safety Goal Violations
- Prove that the risk of a safety goal violation, dus to random hardware failures, is sufficiently low (Use PMHF or Joe Miller method)
5-10 Hardware Integration and Testing
- Verification of the compliance of the developed hardware with the hardware safety requirements and hardware specification, by testing.